Method for forming tungsten contacts and interconnects with small critical dimensions

ABSTRACT

Provided are methods of void-free tungsten fill of high aspect ratio features. According to various embodiments, the methods involve a reduced temperature chemical vapor deposition (CVD) process to fill the features with tungsten. In certain embodiments, the process temperature is maintained at less than about 350° C. during the chemical vapor deposition to fill the feature. The reduced-temperature CVD tungsten fill provides improved tungsten fill in high aspect ratio features, provides improved barriers to fluorine migration into underlying layers, while achieving similar thin film resistivity as standard CVD fill. Also provided are methods of depositing thin tungsten films having low-resistivity. According to various embodiments, the methods involve performing a reduced temperature low resistivity treatment on a deposited nucleation layer prior to depositing a tungsten bulk layer and/or depositing a bulk layer via a reduced temperature CVD process followed by a high temperature CVD process.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit under U.S.C. 119(e) to U.S.provisional application 61/169,954 filed Apr. 16, 2009, titled “METHODFOR FORMING TUNGSTEN CONTACTS AND INTERCONNECTS WITH SMALL CRITICALDIMENSIONS,” the entirety of which is incorporated herein by thisreference.

BACKGROUND

The deposition of tungsten films using chemical vapor deposition (CVD)techniques is an integral part of many semiconductor fabricationprocesses. Tungsten films may be used as low resistivity electricalconnections in the form of horizontal interconnects, vias betweenadjacent metal layers, and contacts between a first metal layer and thedevices on the silicon substrate. In a conventional tungsten depositionprocess, the wafer is heated to the process temperature in a vacuumchamber, and then a very thin portion of tungsten film, which serves asa seed or nucleation layer, is deposited. Thereafter, the remainder ofthe tungsten film (the bulk layer) is deposited on the nucleation layer.Conventionally, the tungsten bulk layer is formed by the reduction oftungsten hexafluoride (WF₆) with hydrogen (H₂) on the growing tungstenlayer.

As semiconductor devices scale to the 32 nm technology node and beyond,shrinking contact and via dimensions make chemical vapor deposition oftungsten more challenging. Increasing aspect ratios can lead to voids orlarge seams within device features, resulting in lower yields anddecreased performance in microprocessor and memory chips. TheInternational Technology Roadmap for Semiconductors (ITRS) calls for 32nm stacked capacitor DRAM contacts to have aspect ratios of greater than20:1. Logic contacts, though not as aggressive as DRAM contacts, willstill be challenged as aspect ratios grow to more than 10:1. Void-freefill in aggressive features like these is problematic using conventionalCVD tungsten deposition techniques.

SUMMARY OF INVENTION

One aspect of the invention relates to methods of void-free tungstenfill of high aspect ratio features. According to various embodiments,the methods involve a reduced temperature chemical vapor deposition(CVD) process to fill the features with tungsten. In certainembodiments, the process temperature is maintained at less than about350° C. during the chemical vapor deposition to fill the feature. Thereduced-temperature CVD tungsten fill provides improved tungsten fill inhigh aspect ratio features, provides improved barriers to fluorinemigration into underlying layers, while achieving similar thin filmresistivity as standard CVD fill. Another aspect of the inventionrelates to methods of depositing thin tungsten films havinglow-resistivity. According to various embodiments, the methods involveperforming a reduced temperature low resistivity treatment on adeposited nucleation layer prior to depositing a tungsten bulk layerand/or depositing a bulk layer via a reduced temperature CVD processfollowed by a high temperature CVD process.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a schematic illustration of a feature filled with tungstennucleation and bulk layers according to certain embodiments.

FIG. 2 is a plot showing volume percentage of a feature occupied by anucleation layer as a function of technology node (feature size) for 12Å and 50 Å nucleation layers.

FIG. 3 is a process flow diagram illustrating operations in a method offilling a feature with tungsten according to various embodiments.

FIG. 4 depicts schematic illustrations of feature cross-sections atvarious stages of a process according to certain embodiments.

FIG. 5 depicts a schematic illustration of a substrate cross-sectionafter a feature filling process according to certain embodiments.

FIG. 6 is a plot depicting defects as a function of film thickness for afilms deposited 1) by a pulsed layer nucleation (PNL) process and lowtemperature chemical vapor deposition (CVD) process and 2) by a PNLprocess only.

FIG. 7 depicts images of films after high and low temperature CVD fillof 32 nm features.

FIG. 8 depicts resistivity as a function of film thickness for filmsdeposited by high and low temperature CVD.

FIG. 9 is a plot depicting resistivity as a function of film thicknessfor tungsten films deposited by various processes.

FIGS. 10-12 are process flow diagrams illustrating operations in methodsof filling a feature with tungsten according to various embodiments.

FIG. 13 is a process flow diagram illustrating operations in a method ofdepositing a tungsten nucleation layer that may be employed with certainembodiments.

FIGS. 14A and 14B illustrates gas pulse sequences in a low resistivitytreatment according to various embodiments.

FIG. 15 is a schematic illustration of a feature cross-section after afeature filling process according to certain embodiments.

FIG. 16A is a plot illustrating resistivity of 50 nm and 10 nm films asa function of reducing agent exposure during a low resistivity treatmentprocess.

FIG. 16B is a plot illustrating resistivity of a 50 nm film as afunction of reducing agent exposure for a low resistivity treatment forfeatures filled via high temperature CVD only and features filled vialow and high temperature CVD.

FIG. 17 is a plot illustrating resistivity as a function of filmthickness for various fill processes.

FIG. 18 is a process flow diagram illustrating operations in a method offilling a feature with tungsten according to various embodiments.

FIG. 19 is a plot illustrating resistivity as a function of filmthickness for various fill processes.

FIG. 20 is a schematic illustration of a processing system suitable forconducting tungsten deposition process in accordance with embodiments ofthe invention.

FIG. 21 is a basis illustration of a tungsten deposition in accordancewith embodiments of the invention.

DETAILED DESCRIPTION Introduction

In the following description, numerous specific details are set forth inorder to provide a thorough understanding of the present invention,which pertains to forming thin tungsten films. Modifications,adaptations or variations of specific methods and structures shown anddiscussed herein will be apparent to those skilled in the art and arewithin the scope of this invention.

Extending tungsten to sub-32 nm technologies is critical to maintainingvia/contact performance and reliability in both memory and logicdevices. There are various challenges in tungsten fill as devices scaleto smaller technology nodes. One challenge is preventing an increase inresistance due to the thinner films in contacts and vias. As featuresbecome smaller, the tungsten (W) contact or line resistance increasesdue to scattering effects in the thinner W film. While efficienttungsten deposition processes require tungsten nucleation layers, theselayers typically have higher electrical resistivities than the bulktungsten layers. As features become smaller, low resistivity tungstenfilms minimize power losses and overheating in integrated circuitdesigns. The thin barrier and tungsten nucleation films, which arehigher in resistivity, occupy a larger percentage of the smallerfeatures.

FIG. 1 shows a volume occupied by a nucleation film 110 and a bulktungsten material 120 in a via/contact structure 100. FIG. 2 shows thepercent the percent volume occupied by 12 Å and 50 Å nucleation films asa function of technology node. Because the resistivity of the nucleationlayer is higher than that of the bulk layer (ρ_(nucleation)>ρ_(bulk))the thickness of the nucleation layer should be minimized to keep thetotal resistance as low as possible. On the other hand, the tungstennucleation should be sufficiently thick to fully cover the underlyingsubstrate to support high quality bulk deposition.

Another challenge in tungsten plugfill as devices scale to smallertechnology nodes is step coverage. Stacked capacitor DRAM contacts, forexample, require high aspect ratio tungsten fill of features greaterthan 20:1 at 32 nm nodes. Logic contacts, though not as aggressive asDRAM contacts, still have challenges as the smaller contact openingsincrease the aspect ratio requirements to near 10:1. Memory devicestypically use CVD TiCl₄ based Ti/TiN liner/barriers, which are fairlyconformal. Logic devices, however, still rely on PVD/MOCVD based Ti/TiNfilms that create additional step coverage challenges associated withlarge overhang that creates a reentrant shape or pinch off. PVD overhangfrom the liner/barrier film magnifies the difficulty in filling smallfeatures. This makes it difficult to fill features not only with thenucleation film, but ultimately the bulk CVD film. Incoming overhangcombined with the dimensions of high aspect ratio structures makes itdifficult or impossible to achieve void-free plugfill using CVD tungstendeposition processes used in previous technology nodes.

According to various embodiments, the present invention providestungsten fill processes to overcome aggressive aspect rations andliner/barrier step coverage limitations, including reducing nucleationfilm thickness and improving step coverage of the fill process. Incertain embodiments, the methods also provide superior barrier filmsagainst fluorine attack of the underlying barrier/liner layer.

FIG. 3 presents a process flow sheet illustrating operations in a methodof providing fill according to certain embodiments. The process beginsby providing substrate having a high aspect ratio feature formedtherein. (302). While embodiments of the invention are not limited tohigh aspect ratio features, the methods described herein are critical toachieving good void-free fill in high aspect ratio features, for whichCVD processes used to fill features in earlier technology nodes do notprovide adequate fill. According to various embodiments, the substratefeature has an aspect ratio of at least 10:1, at least 15:1, at least20:1, at least 25:1 or at least 30:1. Also according to variousembodiments, the feature size is characterized by the feature openingsize in addition to or instead of the aspect ratio. The opening may befrom 10 nm-100 nm, or 10 nm-50 nm wide. For example, in certainembodiments, the methods may be advantageously used with features havingnarrow openings, regardless of the aspect ratio.

In certain embodiments, the recessed feature is formed within adielectric layer on a substrate, with the bottom of the featureproviding contact to an underlying metal layer. Also in certainembodiments, the feature includes a liner/barrier layer on its sidewallsand/or bottom. Examples of liner layers include Ti/TiN, TiN and WN. Inaddition to or instead of diffusion barrier layers, the feature mayinclude layers such as an adhesion layer, a nucleation layer, acombination of thereof, or any other applicable material lining thesidewalls and bottom of the feature.

In certain embodiments, the feature is a re-entrant feature; that is theliner layer or other material forms an overhang that partially blocksthe feature opening. Because many deposition processes do not have goodstep coverage properties, i.e., more material is deposited on the fieldregion and near the opening than inside the feature, the liner layerthicker near the opening than, for example, inside the feature. For thepurposes of this description, “near the opening” is defined as anapproximate position or an area within the feature (i.e., along the sidewall of the feature) corresponding to between about 0-10% of the featuredepth measured from the field region. In certain embodiments, the areanear the opening corresponds to the area at the opening. Further,“inside the feature” is defined as an approximate position or an areawithin the feature corresponding to between about 20-60% of the featuredepth measured from the field region on the top of the feature.Typically, when values for certain parameters (e.g., thicknesses) arespecified “near the opening” or “inside the feature”, these valuesrepresent a measurement or an average of multiple measurements takenwithin these positions/areas. In certain embodiments, an averagethickness of the under-layer near the opening is at least about 10%greater than that inside the feature. In more specific embodiments, thisdifference may be at least about 25%, at least about 50%, or at leastabout 100%. Distribution of a material within a feature may also becharacterized by its step coverage. For the purposes of thisdescription, “step coverage” is defined as a ratio of two thicknesses,i.e., the thickness of the material inside the feature divided by thethickness of the material near the opening. In certain examples, thestep coverage of the liner or other under-layer is less than about 100%or, more specifically, less than about 75% or even less than about 50%.

Returning to FIG. 3, a tungsten nucleation layer is then deposited inthe feature, typically to conformally coat the sidewalls and bottom ofthe feature (304). In general, a nucleation layer is a thin conformallayer which serves to facilitate the subsequent formation of a bulkmaterial thereon. Conformation to the underlying feature is critical tosupport high quality deposition. Various processes may be used to formthe nucleation layer, including but not limited to, CVD processes,atomic layer deposition (ALD) processes and pulsed nucleation layer(PNL) deposition processes.

In a PNL technique, pulses of reactants are sequentially injected andpurged from the reaction chamber, typically by a pulse of a purge gasbetween reactants. A first reactant is typically adsorbed onto thesubstrate, available to react with the next reactant. The process isrepeated in a cyclical fashion until the desired thickness is achieved.PNL is similar to atomic layer deposition techniques reported in theliterature. PNL is generally distinguished from ALD by its higheroperating pressure range (greater than 1 Torr) and its higher growthrate per cycle (greater than 1 monolayer film growth per cycle). In thecontext of the description provided herein, PNL broadly embodies anycyclical process of sequentially adding reactants for reaction on asemiconductor substrate. Thus, the concept embodies techniquesconventionally referred to as ALD. In the context of descriptionprovided herein, CVD embodies processes in which reactants are togetherintroduced to a reactor for a vapor-phase reaction. PNL and ALDprocesses are distinct from CVD processes and vice-versa.

Forming a nucleation layer using one or more PNL cycles is discussed inU.S. Pat. Nos. 6,844,258; 7,005,372; 7,141,494; 7,262,125; and7,589,017; US Patent Publication Nos. 2008/0254623 and 2009/0149022, andU.S. patent application Ser. No. 12/407,541, all of which references areincorporated herein by reference in their entireties. These PNLnucleation layer processes involve exposing a substrate to varioussequences of reducing agents and tungsten precursors to grow anucleation layer of the desired thickness. A combined PNL-CVD method ofdepositing a nucleation layer is described in U.S. Pat. No. 7,655,567,also incorporated in its entirety.

Nucleation layer thickness is enough to support high quality deposition.In certain embodiments, the requisite thickness depends in part on thenucleation layer deposition method. As described further below, incertain embodiments a PNL method providing near 100% step coveragenucleation film at thicknesses as low as about 12 Å (as compared totypical nucleation films of 50 Å) may be used in certain embodiments.Regardless of the method used to deposit the nucleation layer, however,the reduced temperature CVD operation used to fill the feature can beused with thinner nucleation layers than required by conventional highertemperature CVD. Without being bound by any particular theory, it isbelieved that this may be because the slower chemistry at the reducedtemperatures improves growth even on nucleation sites that are not fullydeveloped. According to various embodiments, nucleation layers ofbetween about 30-50 Å (3-5 nm) may be formed, in certain embodiments, aslow as 10-15 Å.

In certain embodiments, depositing the nucleation layer is followed by apost-deposition treatment operation to improve resistivity. Suchtreatment operations are described further below and in more detail inU.S. Patent Publication No. 2009/0149022, and U.S. patent applicationSer. No. 12/407,541, both of which are incorporated by reference herein.

Once the nucleation layer is formed, the process continues by fillingthe feature with a low-temperature CVD tungsten film (306). In thisoperation, a reducing agent and a tungsten-containing precursor areflowed into a deposition chamber to deposit a bulk fill layer in thefeature. An inert carrier gas may be used to deliver one or more of thereactant streams, which may or may not be pre-mixed. Unlike PNL or ALDprocesses, this operation generally involves flowing the reactantscontinuously until the desired amount is deposited. In certainembodiments, the CVD operation may take place in multiple stages, withmultiple periods of continuous and simultaneous flow of reactantsseparated by periods of one or more reactant flows diverted.

Various tungsten-containing gases including, but not limited to, WF₆,WCl₆, and W(CO)₆ can be used as the tungsten-containing precursor. Incertain embodiments, the tungsten-containing precursor is ahalogen-containing compound, such as WF₆. In certain embodiments, thereducing agent is hydrogen gas, though other reducing agents may be usedincluding silane (SiH₄), disilane (Si₂H₆) hydrazine (N₂H₄), diborane(B₂H₆) and germane (GeH₄). In many embodiments, hydrogen gas is used asthe reducing agent in the CVD process.

CVD filling of the feature is performed at a reduced temperature.According to various embodiments, the reduced temperature (processand/or substrate temperature) is in one of the following ranges: betweenabout 250-350° C., between about 250° C.-340° C., between about 250°C.-330° C., between about 250° C.-325° C., between about 250° C.-320°C., between about 250° C.-315° C., between about 250° C.-310° C.,between about 250° C.-305° C., or between about 250° C.-300° C. Alsoaccording to various embodiments, the process and/or substratetemperature is: between about 260-310° C., between about 270° C.-310°C., between about 280° C.-310° C., or between about 290° C.-310° C. Incertain embodiments, the process and/or substrate temperature is about300° C.

After filling the feature, the temperature is raised to deposit a hightemperature CVD layer (308). The high temperature may be in one of thefollowing ranges: between about 350-450° C., between about 360° C.-450°C., between about 370° C.-450° C., between about 380° C.-450° C.,between about 390° C.-450° C., or between about 400° C.-450° C. Incertain embodiments, the high temperature CVD is performed at about 395°C. Raising the temperature may involve raising the substratetemperature. According to various embodiments, the temperature is raisedat least about 50° C., at least about 60° C., at least about 70° C., atleast about 80° C., at least about 90° C., at least about 100° C., or atleast about 110° C. The high temperature CVD layer is then deposited(310). In certain embodiments, operations 308 and 310 are not performed;that is, after the low temperature CVD process is complete and thefeature is filled, the substrate moves on for further processing such asplanarization.

In certain embodiments, transitioning from operation 306 to operation308 involves moving the substrate from one deposition station to anotherin a multi-station chamber. Still further, each of operation 304, thepost-deposition resistivity treatment (if performed), operation 306 andoperation 308 is performed in a different station of the samemulti-station chamber.

In alternative embodiments in which a single station is used to performoperations 306 and 308, transitioning from operation 306 to operation308 involved shutting off a flow of tungsten precursor (optionallyallowing hydrogen or other reducing gas and/or carrier gas to run),while raising the substrate temperature. Once the substrate temperatureis stabilized, the tungsten precursor and other gases, if necessary, areflowed into the reaction chamber for the high temperature deposition. Inother embodiments, transitioning from operation 306 may involve raisingthe substrate temperature while allowing the deposition to continueduring the transition period.

In embodiments in which the high temperature tungsten CVD film isdeposited, it may be deposited as an overburden layer on the filledfeature. FIG. 4 illustrates schematic representations of one example ofa feature's cross-sections at different stages of a filling process inwhich a high temperature CVD layer is deposited after the feature 410 isfilled using reduced temperature CVD. Cross-section 401 represents anexample of the feature 410 prior to any tungsten deposition. In thisexample, the feature 410 is formed in a dielectric layer 430, has anopening 425 at the top surface 405 of the substrate and includes a linerlayer 413, such as TiN layer. In certain embodiments, the size of thecavity near the opening 425 is narrower that inside the feature, forexample, due to overhang 415 of the under-layer 413 as depicted in FIG.4.

Cross-section 411 represents the feature after reduced temperature CVDis performed to fill the feature with low temperature CVD bulk layer453. (The tungsten nucleation layer is not depicted in FIG. 4.) Incertain embodiments, the reduced temperature CVD is performed at leastuntil the feature corner 417 (the point at which the substratetransitions from a planar region to the recessed feature) is coveredwith low temperature CVD tungsten. This is because in certainembodiments the liner, dielectric or other under-layer is particularlyvulnerable to F₂ attack at the feature corner. As discussed furtherbelow, the reduced temperature CVD tungsten has unexpectedly goodbarrier properties, and protects the under-layer from F₂ exposure duringthe subsequent high temperature CVD deposition.

Cross-section 421 represents the feature after the higher temperatureCVD is performed to deposit an overburden layer 455. The featuresidewalls and corners are protected from F₂ attack by thelow-temperature CVD film 453. Cross-section 431 provides a comparativeexample of a narrow feature such as that depicted in cross-section 401filled using a conventional (high temperature) process. With a hightemperature process, because of the overhang 415 and the relatively poorstep coverage of the high temperature layer 455, the closed feature hasan unfilled void 429 (i.e., a seam). The seam is problematic for avariety reasons—increasing resistance in the feature and causingproblems during chemical-mechanical planarization (CMP). Although notvisible in the schematic, the corners or other parts of the liner haveadhesion problems due to F₂ attack, exhibiting peeling or and defects.Such defects are discussed further below with reference to FIG. 6.

In certain embodiments, a substrate having both high aspect ratiofeatures and low aspect ratio features to be filled with tungsten isprovided. For example, a substrate may have one or more features havingan aspect ratio of at least about 10:1 and one or more features havingaspect ratio of less than about 5:1, or 1:1 or 1:2. A reducedtemperature CVD operation may then be performed to fill the one or morehigh aspect ratio features, followed by a high temperature CVD operationto fill the low aspect ratio features. FIG. 5 depicts an example of ahigh aspect ratio feature 510 and a low aspect ratio feature 520 filledin this manner. Feature 510 is filled with low temperature CVD film 553,critical to providing good void-free fill in narrow opening, high aspectratio features. Due to its wide opening (e.g., on the order of hundredsof nanometers to a few microns), an insignificant amount oflow-temperature CVD film is deposited into feature 520. A hightemperature CVD operation is then used to fill feature 520 with hightemperature CVD film 555, and in this case, deposit overburden.

Reduced temperature CVD is critical to obtaining high quality tungstenfill in narrow, high aspect ratio features. Current tungsten CVD isperformed at temperatures around 400° C. Obtaining excellent plugfill onadvanced node features is a challenge that is magnified when thefeatures have pinched openings (as illustrated at cross-section 401 ofFIG. 4). Another challenge is presented by thinning TiN barriers toallow more space in the features for tungsten deposition. In certainembodiments, the advanced node features have barrier layers as less than5 nm thick, as thin as 1 nm. Fluorine migration from the WF₆ inconventional CVD processes into the Ti liner region results inintegration problems include fluorine attack of the liner and yieldloss.

The reduced temperature CVD described above is critical to obtaininghigh quality plugfill. Without being bound by a particular theory, it isbelieved that the high quality plugfill provided by the reducedtemperature CVD is due to a number of factors. First, lower CVDtemperature decreases the tungsten deposition rate by reducing thermaldecomposition of the tungsten-containing precursor. This is believed toaid in plugfill in high aspect ratio, narrow features by reducingtungsten deposition at the feature opening thereby allowing more WF₆ (orother tungsten-containing precursor) molecules to reach the lowerregions of the feature and deposit tungsten. In conventional CVDprocesses, deposition at the top of the feature prevents precursordiffusion into the lower region of the feature. The result is voids orseams in the internal region of the feature, such as depicted incross-section 431 in FIG. 4. Better plugfill has multiple benefits: itresults in more tungsten in the feature, promoting electron transportand reducing contact and line resistance, and it prevents post-CMPproblems. For example, it reduces the likelihood that CMP slurry istrapped in seams and voids.

In addition to the above mechanisms, it is believed that excellentplugfill is due to insufficient energy at the reduced temperatures topromote fluorine migration through the tungsten nucleation and TiNlayers and/or insufficient energy to form TiF_(x) from a reactionbetween Ti and F or T₁ and WF₆, even if the fluorine atoms or tungstenhexafluoride molecules do migrate. A low temperature CVD reactionminimizes Ti attack by fluorine.

In addition to the above, it was found that low temperature CVD tungstenfilm provides unexpectedly good fluorine barrier properties compared totungsten films deposited by other processes. FIG. 6 shows results of adefect study conducted on conventional PNL W and PNL W+low temperatureCVD. PNL W only or PNL W+low temperature W films were deposited on aTi/TiN substrate at the following thicknesses:

PNL W only: 34 Å, 54 Å and 76 ÅPNL W+low temp CVD W: 22 Å PNL+8 Å CVD (30 Å total), 22 Å PNL+10 Å CVD(32 Å total), 22 Å PNL+15 Å CVD (37 Å total)

Both PNLW and low temp CVD occurred at 300° C. Then the W films weresubjected to a torture test where they were exposed to WF₆ at 395° C. Iffluorine diffuses through the W film and the TiN it reacts with theunderlying Ti to form volatile TiF_(X) compounds and results in typical“volcano” defects as well as local peeling, cracking or bubbling. Thesedefects are visible under an optical microscope. As shown in FIG. 6, lowtemperature CVD W along with thin PNL W behaved as a better W diffusionlayer than PNL W only. This is an unexpected result in that for the sameoverall thickness of W film the low temperature CVD film providesimproved F barrier properties. It would have been expected that the thinPNL+low temperature CVD layer would have similar defect counts as thethin PNL layer deposited at the same temperature.

A fluorine attack study was performed on wafers patterned with 100 nmopening/10:1 aspect ratio features including PVD Ti/MOCVD TiN barrierlayers. A tungsten nucleation layer was deposited in the features, witha thin (12 Å) layer used so as to generate an exaggerated signal.Features were filled with either 395° C. CVD tungsten or 350° C. CVDtungsten. Feature fill was then examined and compared. The lowtemperature CVD fill provided better plugfill as well as reducedfluorine attack. In addition to showing reduced fluorine attack, theresults indicate that reduced temperature provides better step coverageon thin nucleation layers. Without being bound by any particular theory,it is believed that the slower chemistry of the reduced temperatureprocess allows growth on nucleation sites that are not fully formed.

Fill of 32 nm re-entrant features was performed using 300° C. and 395°C. The filled features were compared, and the films were examined forvolcano defects. Low temperature CVD resulted in better fill, with feweror no seams or voids. Voids were observed in the high temperature CVDfilled features. FIG. 7 shows microscopic images of the 395° C. film(701) and the 300° C. film (702). Many volcano defects are observed inthe 395° C. film; none in the 300° C. film. In addition to providingimproved plugfill and reduced fluorine attack, the low temperature filmshave resistivities comparable to the high temperature films. This isshown in FIG. 8.

Also provided are improved methods of depositing ultra-low resistivitytungsten films. According to various embodiments, these methods involvedepositing a thin PNL nucleation layer, performing a low resistivitytreatment on the nucleation layer, and depositing a high temperature CVDlayer to fill the feature. In certain embodiments, the low resistivitytreatment includes a low temperature CVD process.

It has been found that low resistivity processes that grow lowresistivity tungsten for thicknesses larger than 20 nm and above may notgrow low resistivity tungsten at thicknesses of 20 nm or less. When thecritical dimension of the devices reduces to 40 nm or lower, thethickness of the tungsten layers in the structures is 20 nm or less.FIG. 9 presents a plot illustrating film resistivity as a function ofthickness for films treated using a first low resistivity process (905)and for films treated using a thin film low resistivity processaccording to certain embodiments (901). For comparison, a film depositedwithout low resistivity treatment (907) is depicted.

The process used to deposit films represented by 905 involves depositinga PNL nucleation layer in a hydrogen-free ambient at reduced temperaturefollowed by a high temperature low resistivity treatment. The untreatedfilms (data series 907 were deposited by a PNL nucleation layer, with nolow resistivity treatment. Nucleation layers of about 20-25 Å weredeposited, with the remaining thickness deposited by low-temperatureCVD. While the high temperature treatment results in film having lowerresistivity for thicknesses greater than 120 Å (12 nm), the opposite istrue for thicknesses less than 120 Å. Process parameters for depositionof the films are shown below:

Nucleation Nucleation Low resistivity Low resistivity layer pulse layertreatment treatment CVD CVD Data series sequence temperature pulsesequence temperature chemistry temperature 907 (no B/W/S/W + 300° C. n/an/a WF₆ and H₂ 300° C. Treatment) 3 × (S/W) (H₂ ambient) 905 (high 5 ×(B/W) 300° C. 6 × (B) 395°C. WF₆ and H₂ 300° C. temperature (H₂-freetreatment) ambient) 901 (thin 5 × (B/W) 300° C. 6 × (B) 300°C. WF₆ andH₂ 300° C. film (H₂-free (partial resistivity ambient) thickness)treatment) 395° C. (remaining thickness)

B=B₂H₆/W=WF₆/S=SiH₄

The increase in resistivity for thin films treated via with hightemperature process was unexpected. As can be seen from the figure, thelow-resistivity treatment according to an embodiment of the inventiveprocesses provides low resistivities even for films less than 120 Å.According to various embodiments, the thin film resistivity treatmentinvolves performing a low temperature resistivity treatment involvingexposing a deposited nucleation layer to multiple pulses of reducingagent at a reduced temperature. The multiple pulses of reducing agentmay or may not include intervening pulses of a tungsten-containingprecursor. Also according to various embodiments, the thin filmresistivity treatment involves a partial fill via reduced temperatureCVD prior to completing fill via high temperature CVD. While depositingsome amount of the bulk CVD material, the reduced temperature CVDoperation may be considered as a low-resistivity treatment. In certainembodiments, the processes involve both a low temperature exposure tomultiple pulses of reducing agent and a partial fill via reducedtemperature CVD, as in the films represented by data series 901 in FIG.9.

While these processes described herein are appropriate for fillingfeatures having sub-40 nm critical dimensions, in particular for filmshaving critical dimensions of 32 nm or smaller, they may also beemployed for thicker films. As discussed further below, the improvedresistivity is also observed for thicker films.

FIGS. 10-12 present process flow sheets illustrating operations inmethods of filling features with low resistivity tungsten according tovarious embodiments. First, in FIG. 10, a substrate having a high aspectratio recessed feature is provided to a deposition chamber (1002). Asnoted above, the feature may have a narrow opening, e.g., 40 nm in widthor less. Also in certain embodiments, the method may be used to fillfeatures having lower aspect ratios and/or wider openings. A tungstennucleation layer is then deposited in the feature (1004).

While the nucleation layer may be deposited by any known method, incertain embodiments, improved resistivity is obtained by depositing thenucleation layer at low temperature, then performing a multi-pulse lowresistivity treatment. Such methods of depositing the nucleation layerare described in U.S. Pat. No. 7,589,017, incorporated by referenceherein and in U.S. Patent Publication 2008/0254623, also incorporated byreference herein.

In certain examples, the nucleation layer is deposited as described inFIG. 13. After a substrate without a nucleation layer (as at 401 in FIG.4) is provided, the as-provided substrate is exposed to aboron-containing reducing agent to form a boron-containing layer on thesubstrate surface (1302). The boron-containing layer is often a layer ofelemental boron, though in some embodiments, it may contain otherchemical species or impurities from the boron-containing species itselfor from residual gases in the reaction chamber. Any suitableboron-containing species may be used, including borane (BH₃), diborane(B₂H₆), triborane, etc. Examples of other boron-containing speciesinclude boron halides (e.g., BF₃, BCl₃) with hydrogen.

Substrate temperature is low—below about 350° C., for example betweenabout 250° C. and 350° C. or 250° C. and 325° C. In certain embodiments,the temperature is around 300° C. In certain embodiments, diborane isprovided from a diluted source (e.g., 5% diborane and 95% nitrogen).Diborane may be delivered the reaction chamber using other or additionalcarrier gases such as nitrogen and/or argon. Importantly, no hydrogen isused.

Once the boron-containing layer is deposited to a sufficient thickness,the flow of boron-containing species to the reaction chamber is stoppedand the reaction chamber is purged with a carrier gas such as argon,hydrogen, nitrogen or helium. In certain embodiments, only argon is usedat the carrier gas. The gas purge clears the regions near the substratesurface of residual gas reactants that could react with fresh gasreactants for the next reaction step.

Continuing to the next operation in FIG. 13, the substrate is contactedwith a tungsten-containing precursor to form a portion of the tungstennucleation layer (1304). Any suitable tungsten-containing precursor maybe used. In certain embodiments the tungsten-containing precursor is oneof WF₆, WCl₆ and W(CO)₆. The tungsten-containing precursor is typicallyprovided in a dilution gas, such as argon, nitrogen, or a combinationthereof. As with the boron-containing precursor pulse, thetungsten-containing precursor is delivered in a non-hydrogenenvironment. The substrate temperature is low—below about 350° C., forexample between about 250° C. and 350° C. or 250° C. and 325° C. Incertain embodiments, the temperature is around 300° C. In many cases,the substrate temperature is the same as during the exposure to theboron-containing species. Tungsten-containing precursor dosage andsubstrate exposure time will vary depending upon a number of factors. Ingeneral, the substrate is exposed until the adsorbed boron species issufficiently consumed by reaction with the tungsten-containing precursorto produce a portion of the tungsten nucleation layer. Thereafter, theflow of tungsten-containing precursor to the reaction chamber is stoppedand the reaction chamber is purged. The resulting portion of tungstennucleation layer deposited in one boron-containing reducingagent/tungsten-containing precursor PNL cycle may be about 5 Å.

The low temperature boron-containing reducing agent pulse and tungstenprecursor pulse operations are repeated to build up the tungstennucleation layer to the desired thickness (1306). Between about 2-7 PNLcycles are required to deposit the very thin nucleation layer in certainembodiments, although in certain embodiments a single cycle may besufficient. Depending on the substrate, the first one or two cycles maynot result in thickness gain due to nucleation delay. As describedpreviously, the tungsten nucleation layer should be sufficiently thin soas to not unduly increase the overall tungsten film, but sufficientlythick so as to support a high quality bulk tungsten deposition. Theprocess described above is able to deposit a tungsten nucleation layerthat can support high quality bulk deposition as low as about 10 Å inthe high aspect ratio and/or narrow width feature. The thickness of thedeposited nucleation layer is typically between about 10 Å and 50 Å, orfor example, between 10 Å and 30 Å.

Temperature is one of the process conditions that affects the amount oftungsten deposited. Others include pressure, flow rate and exposuretime. Maintaining temperatures at or below about 350° C. results in lessmaterial deposited during a cycle. This in turn provides lowerresistivity. In some embodiments, temperatures may be about 300° C. or200° C.

Referring back to FIG. 10, after the tungsten nucleation layer isdeposited, the deposited nucleation layer is treated via low temperaturemulti-pulse treatment to lower resistivity (1006). FIGS. 14 a and 14 bare graphs showing examples of pulse sequences that may be usedaccording to various embodiments of the low resistivity treatment. FIG.14 a shows an example of a pulse sequence such as described in U.S.Patent Publication No. 2009/0149022, incorporated by reference herein.The treatment process described therein involves exposing the depositednucleation layer to multiple pulses of a reducing agent (withoutintervening pulses of another reactive compound). In FIG. 14 a, diboraneis depicted as the reducing agent, though other reducing agents may beused. The treatment lowers resistivity, while providing good adhesionand resistance non-uniformity. Notably, using multiple reducing agentpulses is shown to provide significantly improved resistivity anduniformity than using a single pulse—even with the same overall exposuretime. However, too many pulses may lead to poor adhesion of the eventualtungsten film to the underlying layer. An optimal number of pulses,e.g., between 2-8 is used to obtain low resistivity, low non-uniformityand acceptable adhesion. Unlike the nucleation layer depositiondescribed in FIG. 13, the treatment operation may be performed withhydrogen in the background. Thus, transitioning from the nucleation tothe treatment operation may involve turning on a flow of hydrogen incertain embodiments. Also in certain embodiments, a nucleation layer isdeposited in a first station of a multi-station deposition chamber, withthe low resistivity treatment performed in a second station.Transitioning from the nucleation deposition to the low resistivitytreatment involves transferring the substrate to the second station.

FIG. 14 b shows another example of a pulse sequence in which thenucleation layer is exposed to multiple cycles of alternating reducingagent and a tungsten-containing precursor pulses. Diborane, B₂H₆, andtungsten hexafluoride, WF₆, are shown as the reducing agent andtungsten-containing precursor, respectively, though certain embodimentsmay use other compounds. Alternating pulses of a reducing agent andtungsten-containing precursor are also used to deposit the tungstennucleation layer, but in the treatment operation, typicallysubstantially no tungsten is deposited. The flow rate and/or pulse timeof the tungsten-containing precursor is limited to only scavenge theexcess boron on the surface and in the chamber from the low-resistivitytreatment, reducing the boron impurity. This in turn results in lessmicro-peeling and better film adhesion in certain embodiments.Accordingly, tungsten-containing precursor pulse exposure time and/orflow rate (relative to the reducing agent pulse) during the treatmentmay be less than that used to deposit the nucleation layer.

Some combination of the pulse sequences shown in FIGS. 14 a and 14 b mayalso be performed in certain embodiments. In the embodiments describedherein, the multi-pulse treatment operation is performed at a reducedtemperature (1006), below about 350° C., for example between about 250°C. and 350° C. or 250° C. and 325° C. In certain embodiments, thetemperature is around 300° C. As shown above in FIG. 9 and discussedfurther below, for thin films, performing the low-resistivity treatmentat low temperatures unexpectedly provides better resistivity thanperforming the treatment at higher temperatures. Without being bound byany particular theory, it is believed that this may be due to the amountof boron seen by the substrate. This is discussed further below withreference to FIG. 16A. According to various embodiments, the totalamount of diborane (or other boron-containing reducing agent) exposuremay be between about 1E-5 to 1E-2 moles, or more particularly, fromabout 1E-4 to 1E-3 moles during the multi-pulse treatment. A CVD bulklayer is then deposited to fill the feature (1008). This may involvereduced temperature fill, high temperature fill, or in some embodiments,a combination of both.

FIG. 11 shows a process flow sheet in a method of filling features withlow resistivity tungsten according to certain embodiments in whichreduced temperature CVD is used to partially fill the feature after thenucleation layer is deposited. High temperature CVD is then performed tocomplete the feature fill. A substrate having a high aspect ratio and/ornarrow opening is provided as described with respect to FIG. 10 (1102).A nucleation layer is then deposited in the feature (1104). As describedabove, in certain embodiments, the nucleation layer is deposited asdescribed in FIG. 13, with alternating diborane and tungsten precursorpulses in a low-temperature hydrogen-free environment. A multi-pulse lowresistivity treatment is then optionally performed (1106). Thistreatment may involve multiple reducing agent pulses, without pulsing anintervening tungsten-precursor (as shown in FIG. 14 a) or may involvemultiple reducing agent/tungsten precursor pulses (as shown in FIG. 14b) or some combination of these. According to various embodiments, themulti-pulse treatment involves heating the substrate to a temperaturebetween about 350° C. to 450° C., e.g., about 395° C., and allowing thetemperature to stabilize, and exposing the nucleation layer, whilemaintaining the substrate temperature, to the multiple pulses. In otherembodiments, the multi-pulse treatment is performed at a lowertemperature, as described above with respect to FIG. 10.

Next, the feature is partially filled with a reduced temperature CVDbulk layer (1108). Various tungsten-containing gases including, but notlimited to, WF₆, WCl₆, and W(CO)₆ can be used as the tungsten-containingprecursor. In certain embodiments, the tungsten-containing precursor isa halogen-containing compound, such as WF₆. In certain embodiments, thereducing agent is hydrogen gas, though other reducing agents may be usedincluding silane, disilane, hydrazine, diborane, and germane. In manyembodiments, hydrogen gas is used as the reducing agent in the CVDprocess.

According to various embodiments, the reduced temperature (processand/or substrate temperature) is in one of the following ranges: betweenabout 250-350° C., between about 250° C.-340° C., between about 250°C.-330° C., between about 250° C.-325° C., between about 250° C.-320°C., between about 250° C.-315° C., between about 250° C.-310° C.,between about 250° C.-305° C., or between about 250° C.-300° C. Alsoaccording to various embodiments, the process temperature is: betweenabout 260-310° C., between about 270° C.-310° C., between about 280°C.-310° C., or between about 290° C.-310° C. In certain embodiments, theprocess and/or substrate temperature is about 300° C.

Fill is completed via a high temperature CVD deposition (1110). The hightemperature may be in one of the following ranges: between about350-450° C., between about 360° C.-450° C., between about 370° C.-450°C., between about 380° C.-450° C., between about 390° C.-450° C., orbetween about 400° C.-450° C. In certain embodiments, the hightemperature CVD is performed at about 395° C. Raising the temperaturemay involve raising the substrate temperature. According to variousembodiments, the temperature is raised at least about 25° C., 30° C.,50° C., at least about 60° C., at least about 70° C., at least about 80°C., at least about 90° C., at least about 100° C., at least about 110°C., or at least about 125° C. In one process example, a low temperatureCVD operation is performed at about 250° C. and a high temperature at350° C. In certain embodiments, the temperature is raised no more thanabout 150° C. or even 125° C. to prevent thermal shock and consequentwafer breakage.

In certain embodiments, transitioning from operation 1108 to operation1110 involves moving the substrate from one deposition station toanother in a multi-station chamber. In alternative embodiments in whicha single station is used to perform operations, transitioning fromoperation 1108 to operation 1110 may involve shutting off a flow oftungsten precursor (optionally allowing hydrogen or other reducing gasand/or carrier gas to run), while raising the substrate temperature.Once the substrate temperature is stabilized, the tungsten precursor andother gases, if necessary, are flowed into the reaction chamber for thehigh temperature deposition. In other embodiments, transitioning fromoperation 1210 may involve raising the substrate temperature whileallowing the deposition to continue during the transition period.

According to various embodiments, reduced temperature CVD may be used todeposit about 0-70% of the total thickness of the bulk CVD fill. FIG. 15illustrates a schematic representation of one example of a feature'scross-section after partial reduced temperature CVD fill and completedfill via high temperature CVD. Cross-section 1501 shows conformalpartial fill reduced temperature CVD layer 1553 and high temperaturefill 1555. T, the total thickness of the deposited CVD layer, isindicated (T is the width of the feature fill minus the tungstennucleation layer thickness). 2T1 is the total thickness deposited viareduced temperature CVD. In certain embodiments, reduced temperature CVDmay be used to deposit about 30-80% or 30-60% of the total thickness ofthe bulk CVD fill. The reduced temperature layer may also becharacterized in terms of thickness deposited, with T1 being betweenabout 1-10 nm or about 2-8 nm.

As discussed further below, partially filling the gap with reducedtemperature CVD prior to completing gap fill with high temperature CVDimproves resistivity. While the reduced temperature CVD operationgenerally deposits some amount of conformal tungsten in the feature, itmay also be thought of as a low resistivity treatment operation. Incertain embodiments, the exposure time and/or dose of the reducedtemperature operation may be short or small enough such thatsubstantially no tungsten is deposited.

FIG. 12 presents a process flow diagram in which both a low temperaturemulti-pulse treatment is performed as well as a partial fill via reducedtemperature CVD prior to completing fill via high temperature CVD. Aswith in reference to FIGS. 10 and 11, a substrate having a high aspectratio feature is provided (1202), and a nucleation layer is deposited inthe feature (1204). Depositing a nucleation layer according to certainembodiments is described in FIG. 13. A low-temperature multiple pulsetreatment is then performed (1206) as described above with respect toFIG. 10. At this juncture, in certain embodiments, both the nucleationlayer formation and subsequent multi-pulse treatment operation involvethe use of a boron-containing compound exclusively as a reducing agent;that is, silanes or other non-boron-containing reducing agents are notused in any operation preceding CVD deposition. Partial fill via reducedtemperature CVD is then performed (1208), followed by completing fillusing high temperature CVD (1210) as described above with respect toFIG. 11.

In certain embodiments, the processes described herein involve exposinga deposited tungsten nucleation layer to multiple, sequential pulses ofdiborane or other boron-containing reducing agent. See, e.g., the abovediscussion with respect to FIG. 10. FIG. 16A plots resistivity ofblanket tungsten films as a function of total diborane exposure (inmoles) during a low-temperature multi-pulse treatment process onnucleation layers. Nucleation layer were dosed with diborane as shown,followed by CVD to deposit 50 nm or 10 nm blanket films. 50 nm tungstenfilm resistivity decreases with increased dose time. Unexpectedly, forthe thin 10 nm film, resistivity increases with increased dose time. Incertain embodiments, with thin films of about 20 nm or less, themulti-pulse treatment is not performed, or the diborane exposure ismaintained at no more than about 1E-5 to 1E-3 moles total exposure.

As indicated above, partial fill of a feature using reduced temperatureCVD improves resistivity. FIG. 16B plots resistivity of 50 nm blanketfilms deposited with partial reduced temperature (300° C.) CVD and hightemperature-only (395° C.) CVD as a function of multi-pulse lowresistivity tungsten (LRW) diborane pulses. The process shown in FIG. 13was used to deposit the nucleation layer, followed by a multi-pulsetreatment as represented in FIG. 14 a at 395° C. The partial reducedtemperature CVD film is 6 nm, with the remainder of the film thicknessdeposited by high temperature CVD. Resistivities of both films decreasewith an increased number of cycles of the multi-pulse treatment.However, the films with a thin reduced temperature CVD film depositedafter the treatment have a lower resistivity that those films with hightemperature-only CVD films. As shown, for thick films (e.g., >40 nm),the reduced temperature CVD partial fill improves resistivity. Incertain embodiments, the reduced temperature CVD achieves lowresistivity with a lower number of diborane pulses.

FIG. 17 shows film resistivity plotted against film thickness for theprocesses as described above in reference to FIGS. 10-12. For all films,a nucleation layer of about 2 nm was deposited with the nucleation layersequence was 5×(B₂H₆/WF₆) (H₂-free ambient) at 300° C. Processes used todeposit the blanket films are shown below:

Low Low resistivity resistivity treatment treatment CVD CVD Processpulse sequence temperature chemistry temperature A 6 x (B₂H₆) 395° C.WF₆ and H₂ 395° C. (only) B 6 x (B₂H₆) 395° C. WF₆ and H₂ 300° C. (only)C 6 x (B₂H₆) 300° C. WF₆ and H₂ 300° C. (partial (FIG. 12) thickness -about 30 Å or 3 nm for each film) 395° C. (remaining thickness) D 6 x(B₂H₆) 300° C. WF₆ and H₂ 300° C. (only) E 6 x (B₂H₆) 300° C. WF₆ and H₂395° C. (only)Between 8 and 15 nm, process C (a low temperature multi-pulse treatmentand partial reduced temperature CVD) resulted in the lowest resistivity.Unexpectedly, partial reduced temperature CVD (process C) results inlower resistivity than reduced temperature-only CVD (process D) andhigh-temperature only CVD (E) for identical nucleation and treatmentprocesses for films of about 7.5 nm and above.

Comparing process A to process E, low temperature low resistivitytreatment results in lower resistivity for films less than about 9 nmthick. However, for reduced temperature-only CVD, as discussed abovewith respect to FIG. 9, the high temperature low-resistivity treatment(process B) results in higher resistivity than the low temperaturelow-resistivity process (process D) for almost all film thicknessesbelow about 120 nm.

In certain embodiments, reduced temperature CVD is preceded by atungsten-precursor soak operation to lower resistivity. FIG. 18 presentsa process flow illustrating operations in such a process. First, asubstrate having a high aspect ratio feature is provided (1802). As withall the processes described herein, this process may also be employedwith other feature geometries. Then, a tungsten nucleation layer isdeposited in the feature by any appropriate method (1804), followed by amulti-pulse treatment (1806) as described above with reference to FIGS.14A and 14B. At this point, the substrate is exposed to thetungsten-precursor, without the presence of reducing agent, in atungsten-precursor soak operation (1808). Soak time may be between about0.5 seconds to 10 seconds, e.g., about 1-5 seconds. Temperature duringthe soak operation may be the same temperature as the subsequent reducedtemperature CVD, e.g., 300° C. After the tungsten-precursor soak, thefeature is then filled with reduced temperature CVD tungsten film(1810). In alternative embodiments, the tungsten-precursor soak may beperformed prior to partial fill reduced temperature CVD.

FIG. 19 is a plot of thin film resistivity as function of film thicknessfor films deposited by reduced temperature CVD with and without a WF₆soak. For all films, a nucleation layer was deposited using the processshown in FIG. 13, followed by a multi-pulse diborane low resistivitytreatment. For films between about 8-12 nm, soaking achieves lowerresistivity than the process without soaking. In certain embodiments,the process described in FIG. 18 is used to achieve low resistivity withthe high quality plugfill described above with reference to FIG. 3.

Apparatus

The methods of the invention may be carried out in various types ofdeposition apparatus available from various vendors. Examples ofsuitable apparatus include a Novellus Concept-1 Altus™, a Concept 2Altus™, a Concept-2 ALTUS-S™, Concept 3 Altus™ deposition system, andAltus Max™ or any of a variety of other commercially available CVDtools. In some cases, the process can be performed on multipledeposition stations sequentially. See, e.g., U.S. Pat. No. 6,143,082,which is incorporated herein by reference for all purposes. In someembodiments, a nucleation layer is deposited, e.g., by a pulsednucleation process at a first station that is one of two, five or evenmore deposition stations positioned within a single deposition chamber.Thus, the reducing gases and the tungsten-containing gases arealternately introduced to the surface of the semiconductor substrate, atthe first station, using an individual gas supply system that creates alocalized atmosphere at the substrate surface.

A second station may then be used to complete nucleation layerdeposition or to perform a multi-pulse low resistivity treatment. Incertain embodiments, a single pulse low resistivity treatment may beperformed.

One or more stations are then used to perform CVD as described above.Two or more stations may be used to perform CVD in a parallelprocessing. Alternatively a wafer may be indexed to have the CVDoperations performed over two or more stations sequentially. Forexample, in processes involving both low temperature and hightemperature CVD operations, a wafer or other substrate is indexed fromone CVD station to another for each operation.

FIG. 20 is a block diagram of a processing system suitable forconducting tungsten thin film deposition processes in accordance withembodiments of the invention. The system 2000 includes a transfer module2003. The transfer module 2003 provides a clean, pressurized environmentto minimize the risk of contamination of substrates being processed asthey are moved between the various reactor modules. Mounted on thetransfer module 2003 is a multi-station reactor 2009 capable ofperforming PNL deposition, multi-pulse treatment if desired, and CVDaccording to embodiments of the invention. Chamber 2009 may includemultiple stations 2011, 2013, 2015, and 2017 that may sequentiallyperform these operations. For example, chamber 2009 could be configuredsuch that station 2011 performs PNL deposition, station 2013 performsmulti-pulse treatment, and stations 2015 and 2017 perform CVD. Eachdeposition station includes a heated wafer pedestal and a showerhead,dispersion plate or other gas inlet. An example of a deposition station2100 is depicted in FIG. 21, including wafer support 2102 and showerhead2103. A heater may be provided in pedestal portion 2101.

Also mounted on the transfer module 2003 may be one or more single ormulti-station modules 2007 capable of performing plasma or chemical(non-plasma) pre-cleans. The module may also be used for various othertreatments, e.g., post liner tungsten nitride treatments. The system2000 also includes one or more (in this case two) wafer source modules2001 where wafers are stored before and after processing. An atmosphericrobot (not shown) in the atmospheric transfer chamber 2019 first removeswafers from the source modules 2001 to loadlocks 2021. A wafer transferdevice (generally a robot arm unit) in the transfer module 2003 movesthe wafers from loadlocks 2021 to and among the modules mounted on thetransfer module 2003.

In certain embodiments, a system controller 2029 is employed to controlprocess conditions during deposition. The controller will typicallyinclude one or more memory devices and one or more processors. Theprocessor may include a CPU or computer, analog and/or digitalinput/output connections, stepper motor controller boards, etc.

The controller may control all of the activities of the depositionapparatus. The system controller executes system control softwareincluding sets of instructions for controlling the timing, mixture ofgases, chamber pressure, chamber temperature, wafer temperature, RFpower levels, wafer chuck or pedestal position, and other parameters ofa particular process. Other computer programs stored on memory devicesassociated with the controller may be employed in some embodiments.

Typically there will be a user interface associated with the controller.The user interface may include a display screen, graphical softwaredisplays of the apparatus and/or process conditions, and user inputdevices such as pointing devices, keyboards, touch screens, microphones,etc.

The computer program code for controlling the deposition and otherprocesses in a process sequence can be written in any conventionalcomputer readable programming language: for example, assembly language,C, C++, Pascal, Fortran or others. Compiled object code or script isexecuted by the processor to perform the tasks identified in theprogram.

The controller parameters relate to process conditions such as, forexample, process gas composition and flow rates, temperature, pressure,plasma conditions such as RF power levels and the low frequency RFfrequency, cooling gas pressure, and chamber wall temperature. Theseparameters are provided to the user in the form of a recipe, and may beentered utilizing the user interface.

Signals for monitoring the process may be provided by analog and/ordigital input connections of the system controller. The signals forcontrolling the process are output on the analog and digital outputconnections of the deposition apparatus.

The system software may be designed or configured in many differentways. For example, various chamber component subroutines or controlobjects may be written to control operation of the chamber componentsnecessary to carry out the inventive deposition processes. Examples ofprograms or sections of programs for this purpose include substratepositioning code, process gas control code, pressure control code,heater control code, and plasma control code.

A substrate positioning program may include program code for controllingchamber components that are used to load the substrate onto a pedestalor chuck and to control the spacing between the substrate and otherparts of the chamber such as a gas inlet and/or target. A process gascontrol program may include code for controlling gas composition andflow rates and optionally for flowing gas into the chamber prior todeposition in order to stabilize the pressure in the chamber. A pressurecontrol program may include code for controlling the pressure in thechamber by regulating, e.g., a throttle valve in the exhaust system ofthe chamber. A heater control program may include code for controllingthe current to a heating unit that is used to heat the substrate.Alternatively, the heater control program may control delivery of a heattransfer gas such as helium to the wafer chuck.

Examples of chamber sensors that may be monitored during depositioninclude mass flow controllers, pressure sensors such as manometers, andthermocouples located in pedestal or chuck. Appropriately programmedfeedback and control algorithms may be used with data from these sensorsto maintain desired process conditions. The foregoing describesimplementation of embodiments of the invention in a single ormulti-chamber semiconductor processing tool.

Applications

The present invention may be used to deposit thin, low resistivitytungsten layers for many different applications. One application isvias, contacts and other tungsten structures commonly found inelectronic devices. Another application are interconnects in integratedcircuits such as memory chips and microprocessors. Interconnects arecurrent lines found on a single metallization layer and are generallylong thin flat structures. A primary example of an interconnectapplication is a bit line in a memory chip. In general, the inventionfinds application in any environment where thin, low-resistivitytungsten layers are required.

Other Embodiments

While this invention has been described in terms of several embodiments,there are alterations, modifications, permutations, and substituteequivalents, which fall within the scope of this invention. For example,while the above description is chiefly in the context of feature fill,the methods described above may also be used to deposit low resistivitytungsten films on blanket surfaces. These may be formed by a blanketdeposition of a tungsten layer (by a process as described above),followed by a patterning operation that defines the location of currentcarrying tungsten lines and removal of the tungsten from regions outsidethe tungsten lines.

It should also be noted that there are many alternative ways ofimplementing the methods and apparatuses of the present invention. It istherefore intended that the following appended claims be interpreted asincluding all such alterations, modifications, permutations, andsubstitute equivalents as fall within the true spirit and scope of thepresent invention.

1. A method of filling a recessed feature on a substrate, the methodcomprising: providing a substrate having a field region and a firstfeature recessed from the field region, said recessed feature comprisingsidewalls, a bottom, an opening, and corners; depositing a tungstennucleation layer on the sidewalls and bottom of the recessed feature;and filling the feature with a low temperature CVD tungsten bulk layervia a chemical vapor deposition (CVD) process; wherein the substratetemperature during the CVD process is maintained at between about 250°C. and 350° C.
 2. The method of claim 1, further comprising afterfilling the first recessed feature, raising the substrate temperature atleast about 50° C. and, after raising the substrate temperature,depositing a high temperature bulk tungsten CVD layer on the filledfirst recessed feature.
 3. The method of claim 1 wherein the firstrecessed feature has an aspect ratio of at least 10:1.
 4. The method ofclaim 1 wherein the first recessed feature has an aspect ratio of atleast 20:1.
 5. The method of claim 1 wherein width of the first recessedfeature opening is no more than about 100 nm.
 6. The method of claim 1wherein width of the first recessed feature opening is no more thanabout 50 nm.
 7. The method of claim 1 wherein the width of the firstrecessed feature opening is no more than about 40 nm.
 8. The method ofclaim 1 wherein filling the first recessed feature comprises coveringthe feature corners with the low temperature CVD bulk layer.
 9. Themethod of claim 1 wherein the substrate further comprises a secondfeature recessed from the field region, said second recessed featurehaving an aspect ratio lower than that of the first feature.
 10. Themethod of claim 9 further comprising, after filling the first recessedfeature, raising the substrate temperature at least about 50° C. and,after raising the substrate temperature, depositing a high temperaturebulk tungsten CVD layer to fill the second recessed feature.
 11. Themethod of claim 1 wherein filling the feature with a low temperature CVDtungsten bulk layer comprises introducing a halogenatedtungsten-containing precursor and a reducing agent into a reactionstation housing the substrate.
 12. The method of claim 11 wherein thehalogenated tungsten-containing precursor is tungsten hexafluoride. 13.The method of claim 1 wherein the feature comprises a liner layer. 14.The method of claim 13 wherein the liner layer is a Ti/TiN layer. 15.The method of claim 13 wherein the liner layer has a thickness of nomore than 5 nm.
 16. The method of claim 1 further comprising, afterdepositing a tungsten nucleation layer on the sidewalls and bottom ofthe recessed feature and prior to filling the feature with a lowtemperature CVD tungsten bulk layer, soaking the substrate with atungsten-precursor.
 17. The method of claim 1 wherein substratetemperature during the CVD process is maintained at between about 250°C. and 325° C.
 18. An apparatus for depositing tungsten film on asubstrate comprising: a) a multistation substrate deposition chambercomprising: a tungsten nucleation layer deposition station, thedeposition station comprising a substrate support and one or more gasinlets configured to expose the substrate to pulses of gas; a bulk layerdeposition station, the tungsten bulk layer deposition stationcomprising a substrate support and one or more gas inlets configured toexpose the substrate to gases; and b) a controller for controlling theoperations in the multistation deposition chamber, comprising machinereadable instructions for: pulsing a plurality of reducing agentpulse/purge gas pulse/tungsten-containing precursor pulse cycles in thetungsten nucleation layer deposition station to deposit on tungstennucleation layer on the substrate surface; transferring the substratefrom the tungsten nucleation layer deposition station to the bulk layerdeposition station; and simultaneously flowing reducing agent andtungsten-containing precursor into the bulk layer deposition stationwhile maintaining a substrate temperature of between about 250° C. and350° C.
 19. The apparatus of claim 18 further comprising alow-resistivity treatment station, the low-resistivity treatment stationcomprising a substrate support and one or more gas inlets configured toexpose the substrate to pulses of gas; wherein controller furthercomprises machine readable instructions for pulsing a plurality ofreducing agent pulses into the low-resistivity treatment station andwherein the instructions for transferring the substrate from thetungsten nucleation layer deposition station to the bulk layerdeposition station comprise instructions for transferring the substratefrom the tungsten nucleation layer deposition station to thelow-resistivity treatment station and instructions for transferring thesubstrate from the low-resistivity treatment station to the bulk layerdeposition station.